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| 12-Bit CCD Signal Processor with Precision Timing TM Generator AD9994 FEATURES 10-phase or 12-phase vertical transfer clocking Supports 4-field and 5-field CCD readout Correlated double sampler (CDS) 6 dB to 42 dB 10-bit variable gain amplifier (VGA) 12-bit 36 MHz A/D converter Black level clamp with variable level control Complete on-chip timing generator Precision Timing core with < 600 ps resolution On-chip 3 V horizontal and RG drivers 2-phase and 4-phase H-clock modes Electronic and mechanical shutter support On-chip driver for external crystal On-chip sync generator with external sync input 64-lead LFCSP package (9 mm x 9 mm, 0.5 mm pitch) GENERAL DESCRIPTION The AD9994 is a highly integrated CCD signal processor for digital still camera applications. It includes a complete analog front end with A/D conversion, combined with a full-function programmable timing generator. The timing generator is capable of up to 12-phase vertical clocking to support advanced CCDs with 4-field and 5-field readout. A Precision Timing core allows adjustment of high speed clocks with approximately 600 ps resolution at 36 MHz operation. The AD9994 is specified at pixel rates of up to 36 MHz. The analog front end includes black level clamping, CDS, VGA, and a 12-bit A/D converter. The timing generator provides all the necessary CCD clocks: RG, H-clocks, V-clocks, sensor gate pulses, substrate clock, and substrate bias control. Operation is programmed using a 3-wire serial interface. Packaged in a 64-lead LFCSP, the AD9994 is specified over an operating temperature range of -25C to +85C. For more information about the AD9994, email Analog Devices at afe.ccd@analog.com. APPLICATION Digital still cameras FUNCTIONAL BLOCK DIAGRAM REFT REFB AD9994 6dB TO 42dB CCDIN CDS -3dB, 0dB, +3dB, +6dB VGA VREF 12-BIT ADC CLAMP INTERNAL CLOCKS RG HL 4 H1 TO H4 V1 TO V10 (V1 TO V12) VSG1 TO VSG8 (VSG1 TO VSG6) 10 OR 12 VERTICAL TIMING CONTROL SYNC GENERATOR INTERNAL REGISTERS HORIZONTAL DRIVERS PRECISION TIMING GENERATOR MSHUT STROBE DCLK 12 DOUT 8 OR 6 VSUB VSUB HD VD SYNC CLI CLO SL SCK DATA Figure 1. Rev. Sp0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved. 04972-0-001 AD9994 (c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04972F-0-10/04(Sp0) Rev. Sp0 | Page 2 of 2 |
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